Research map / Label-efficient and robust learning / Self-supervised and contrastive
DeepLayout: Learning Neural Representations of Circuit Placement Layout
Read the paperCheck your idea against 108,967 papers
AI-extracted summary. Written by AI from the paper's full text. Numbers and claims can be wrong or missing context, so check the paper before you cite or build on it.
Proposes DeepLayout, a masked-autoencoder-style self-supervised representation learner for post-placement circuit layouts (hybrid GNN + spatial attention encoder) that is pre-trained on unlabeled placements and fine-tuned for congestion prediction and post-routing wirelength estimation.
Problem
Task-specific circuit models for backend physical design need large labeled datasets and do not transfer across tasks; prior circuit representation learning focuses on front-end logic rather than post-placement layout.
Approach
Model post-placement circuits as heterogeneous cell/net graphs, mask grid-based regions of cells (zeroing coordinates while keeping topology), and pre-train an encoder with cell coordinate reconstruction plus a routing-probability (RPA) prediction loss, so the encoder transfers to downstream layout quality tasks with few labels.
Key results
- On congestion prediction with 5/10/20 fine-tuning samples, DeepLayout reaches Pearson 0.4270/0.4383/0.4418, versus 0.2679/0.2663/0.3174 for Gpdl and 0.2978/0.2155/0.2374 for CircuitGNN.
- On post-routing wirelength estimation, DeepLayout achieves Pearson 0.3704–0.3961 and RMSE 0.1682–0.1695, outperforming Net2 and CircuitGNN across 5/10/20 samples.
- A 50% mask ratio gave the best downstream performance versus 20% and 80%, differing from the 75% commonly used in MAE.
Measured effects reported in the paper
| What was changed | Where | Measured | Effect |
|---|---|---|---|
| Use DeepLayout instead of the strongest baseline | Congestion prediction · Congestion prediction, 5 samples | Pearson: 0.2978 -> 0.4270 | Helped |
| Use DeepLayout instead of the strongest baseline | Congestion prediction · Congestion prediction, 20 samples | RMSE: 0.0392 -> 0.0349 | Helped |
| Use DeepLayout instead of the strongest baseline | Post-routing wirelength estimation · Post-routing wirelength estimation, 20 samples | Pearson: 0.3691 -> 0.3961 | Helped |
| Use DeepLayout instead of the strongest baseline | Post-routing wirelength estimation · Post-routing wirelength estimation, 20 samples | MAE: 0.1319 -> 0.1270 | Helped |
| Use a 50% rather than 20% or 80% pre-training mask ratio (ablation) | DeepLayout · Congestion prediction | Performance (metric not specified in text) | Helped |
| Use a 50% rather than 20% or 80% pre-training mask ratio (ablation) | DeepLayout · Post-routing wirelength estimation | Performance (metric not specified in text) | Helped |
Surprising findings
- Optimal mask ratio is 50%, lower than the 75% used in image MAE, which the authors attribute to circuits having less redundancy than images.
- Pre-training is restricted to placement-only data with no routing labels, yet the routing-probability proxy target still improves downstream routing-related predictions.
Limitations
- Evaluation limited to two downstream tasks on a single CircuitNet-N28 design split.
- Pearson correlations remain modest (around 0.37–0.44), indicating limited absolute predictive accuracy.
- Compared baselines are re-implemented variants (e.g., improved CircuitGNN and Net2) rather than official releases.
Experimental setup
Datasets: CircuitNet-N28
Benchmarks: CircuitNet-N28 congestion prediction CircuitNet-N28 post-routing wirelength estimation
Metrics: Pearson MAE RMSE SSIM
Baselines: Gpdl CircuitGNN CircuitPoint Net2
Builds on: Masked Autoencoders (MAE) BERT DeepGate Vision Transformer
Closest papers by meaning
- DeepGate4: Efficient and Effective Representation Learning for Circuit Design at Scale (ICLR 2025 · similarity 0.89)
- CircuitFusion: Multimodal Circuit Representation Learning for Agile Chip Design (ICLR 2025 · similarity 0.88)
- Circuit Representation Learning with Masked Gate Modeling and Verilog-AIG Alignment (ICLR 2025 · similarity 0.87)
- FlexPlanner: Flexible 3D Floorplanning via Deep Reinforcement Learning in Hybrid Action Space with Multi-Modality Representation (NeurIPS 2024 · similarity 0.86)
- Chip Placement with Diffusion Models (ICML 2025 · similarity 0.85)
- See it to Place it: Evolving Macro Placements with Vision Language Models (NeurIPS 2026 · similarity 0.84)
Writing a paper in this area? scime draft is a free LaTeX editor with AI included, real-time co-authors and a check of your references and venue rules before you submit. It also imports OpenAI Prism projects.