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See it to Place it: Evolving Macro Placements with Vision Language Models

NeurIPS 2026 · Vision-language and multimodal › Multimodal LLMs · approach: Spatial reasoning in VLMs · 0 citations (OpenAlex)

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Proposes VeoPlace, which uses a frozen VLM (Gemini 2.5 Flash) to propose macro regions that constrain a base placer (ChiPFormer or DREAMPlace) within an evolutionary, history-buffer loop, improving wirelength over prior learning-based and analytical placers.

Problem

Macro placement in chip floorplanning is a hard multi-objective combinatorial problem; learning-based placers trained from scratch generalize poorly to unseen chips under a fixed budget of placement attempts.

Approach

Use a VLM without fine-tuning as a variation operator in an evolutionary loop: it sees rendered canvas images and textual history of prior placements with HPWL, and proposes per-macro bounding regions that either mask a learned policy's action distribution or act as soft anchor terms in an analytical placer's objective.

Key results

• On Superblue, VeoPlace-guided DREAMPlace beats DREAMPlace 4.3.0 on all 8 benchmarks, with HPWL reductions from 1.3% to 4.3%.
• Against ChiPFormer, VeoPlace (Gemini 2.5 Flash, C=1) wins on 9 of 10 benchmarks, with about 32% lower HPWL on ibm02 and 26% on ariane136.
• The VLM is queried only 125 times per 2,000-rollout run, with an estimated API cost of about $7 per run.

Surprising findings

• VeoPlace-guided ChiPFormer is worse than the baseline on adaptec1 (+12.2%), so the method does not uniformly help.
• Greedy-refinement and exploratory prompts both underperform the default prompt, and the 'Best' context selection strategy performs worst due to local minima.

Limitations

• Optimizes only wirelength (global HPWL); timing and power not evaluated.
• Relies on paid VLM API calls, adding latency (~230 s per query) and cost.
• Learning-based evaluation uses fixed macros with a two-stage flow, which departs from prior evaluation protocols.

Experimental setup

Datasets: ISPD 2005 ICCAD 2004 Ariane (Nangate45) ICCAD 2015 Superblue

Benchmarks: ISPD 2005 adaptec1-4 ICCAD 2004 ibm01-04 Ariane133 Ariane136 ICCAD 2015 superblue1/3/4/5/7/10/16/18

Metrics: global HPWL RUDY congestion proxy wall-clock time API cost

Baselines: ChiPFormer (No-FT) ChiPFormer (FT) DREAMPlace 4.3.0 EvoPlace

Builds on: ChiPFormer DREAMPlace Decision Transformer EvoPlace

Closest papers by meaning

• EGPlace: An Efficient Macro Placement Method via Evolutionary Search with Greedy Repositioning Guided Mutation (ICML 2025 · similarity 0.89)
• Chip Placement with Diffusion Models (ICML 2025 · similarity 0.88)
• Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithms (NeurIPS 2025 · similarity 0.87)
• Reinforcement Learning within Tree Search for Fast Macro Placement (ICML 2024 · similarity 0.87)
• LayoutVLM: Differentiable Optimization of 3D Layout via Vision-Language Models (CVPR 2025 · similarity 0.86)
• FlexPlanner: Flexible 3D Floorplanning via Deep Reinforcement Learning in Hybrid Action Space with Multi-Modality Representation (NeurIPS 2024 · similarity 0.86)