Research map / Learning theory and algorithms / Combinatorial and search optimization
Circuit Minimization with QBF-Based Exact Synthesis
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Measured effects reported in the paper
| What was changed | Where | Measured | Effect |
|---|---|---|---|
| resynthesize subcircuits without requiring local equivalence, while preserving equivalence of the whole circuit (ablation) | QBF-based circuit minimization · IWLS2022 instances, overall | average size reduction (%): 8.4 -> 24.3 | Helped |
| allow multi-output subcircuits instead of restricting selection to one output (ablation) | QBF-based circuit minimization · IWLS2022 instances, overall | average size reduction (%): 18.1 -> 24.3 | Helped |
| allow same-sized replacements that can modify the circuit (ablation) | QBF-based circuit minimization · IWLS2022 instances, overall | average size reduction (%): 11.7 -> 24.3 | Helped |
| apply ABC inprocessing between optimization runs (ablation) | QBF-based circuit minimization · IWLS2022 instances, overall | average size reduction (%): 18.3 -> 24.3 | Helped |
| use QBF-based iterative resynthesis for 48 hours | EPFL combinational circuits · Coding-cavlc | number of gates: 68 -> 58 | Helped |
| use QBF-based iterative resynthesis for 48 hours | EPFL combinational circuits · Memory controller | number of gates: 2019 -> 1975 | Helped |
Closest papers by meaning
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- A Circuit Domain Generalization Framework for Efficient Logic Synthesis in Chip Design (ICML 2024 · similarity 0.83)
- GPU-Accelerated Synthesis of Mixed-Boolean Arithmetic: Beyond Caching (NeurIPS 2026 · similarity 0.82)
- An And-Sum Circuit with Signed Edges That Is More Succinct than SDD (AAAI 2025 · similarity 0.82)
- Towards Next-Generation Logic Synthesis: A Scalable Neural Circuit Generation Framework (NeurIPS 2024 · similarity 0.81)
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