Research map / Architectures and efficiency / CNN design
High Performance Zero-Memory Overhead Direct Convolutions
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Measured effects reported in the paper
| What was changed | Where | Measured | Effect |
|---|---|---|---|
| Replace SGEMM plus im2col packing with direct convolution | Convolution layers in AlexNet, GoogLeNet, and VGG · Intel, AMD, and ARM architectures | performance: between 10% and 400% | Helped |
| Replace OpenBLAS-based SGEMM convolution with direct convolution | Convolution layers in AlexNet, GoogLeNet, and VGG · 4 threads on OpenBLAS architectures | performance: minimum of 1.5 times performance gain | Helped |
| Use direct convolution instead of NNPACK FFT-based convolution | Convolution layers · ARM | performance | Helped |
| Use direct convolution instead of NNPACK FFT-based convolution | Convolution layers · Intel | performance | Helped |
| Increase thread count up to the physical core count | High-performance direct convolution · Intel, AMD, and ARM | performance per core | No clear effect |
| Increase thread count beyond the physical core count | High-performance direct convolution · Intel, AMD, and ARM | performance per core | Hurt |
| Increase thread count | SGEMM-based convolution · Intel, AMD, and ARM | performance per core | Hurt |
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