atlas

Research map / Architectures and efficiency / Attention and transformers

FTerViT: Fully Ternary Vision Transformer

NeurIPS 2026 · Architectures and efficiency › Attention and transformers · approach: Hybrid and interpretable ViT designs · 0 citations (OpenAlex)

Read the paperCheck your idea against 108,967 papers

AI-extracted summary. Written by AI from the paper's full text. Numbers and claims can be wrong or missing context, so check the paper before you cite or build on it.

Fully ternarizes a Vision Transformer (weights, patch embedding, LayerNorm affines, classifier head) via same-architecture KL distillation plus a low-LR recovery phase, reaching 79.64% ImageNet top-1 at 5.81 MB and running on an ESP32-S3 MCU.

Problem

Ternary ViTs keep patch embeddings, LayerNorms and classifier heads in full precision, and these components dominate the memory footprint of compact ViTs, blocking deployment on microcontroller-class hardware.

Approach

Ternarize every weight matrix and LayerNorm affine (TernaryBitConv2d with per-channel scales for patch embedding, TernaryLayerNorm) and train the ternary student from its FP32 teacher with KL-only distillation followed by a short low-LR recovery phase.

Key results

Surprising findings

Limitations

Experimental setup

Datasets: ImageNet-1K CIFAR-10 CIFAR-100

Benchmarks: ImageNet-1K CIFAR-10 CIFAR-100

Metrics: top-1 accuracy model size (MB) compression ratio latency power/energy

Baselines: TerViT ViT-1.58b Q-ViT OFQ LSQ PTQ4ViT RepQ-ViT Bi-ViT BiViT MCUFormer TinyFormer LMaNet-Elite

Builds on: BitNet b1.58 TerViT TWN DeiT-III HAWQ

Closest papers by meaning

Writing a paper in this area? scime draft is a free LaTeX editor with AI included, real-time co-authors and a check of your references and venue rules before you submit. It also imports OpenAI Prism projects.

Open scime draft

Get the next scime Dispatch and a monthly field update

Free. We send a confirmation link first; every email has a one-click unsubscribe. Privacy