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ScaleBITS: Scalable Bitwidth Search for Hardware-Aligned Mixed-Precision LLMs

NeurIPS 2026 · Architectures and efficiency › Quantization · approach: Post-training quantization of LLMs · 0 citations (OpenAlex)

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Proposes ScaleBITS, a mixed-precision post-training weight quantization framework for LLMs that uses dynamic sensitivity measured at a quantized reference point, bi-directional channel reordering, and hardware-aligned block partitions with a scalable batched greedy bit allocation search.

Problem

Pushing post-training weight-only quantization of LLMs below 4 bits degrades quality, and existing mixed-precision methods either use hardware-unfriendly fine-grained partitions or coarse/heuristic precision allocation that cannot scale to billions of weights.

Approach

Sensitivity is estimated as a first-order term around the current quantized model (not full precision), weight channels are reordered in both row and column directions so sensitive weights cluster into block-aligned regions, and a batched approximation to greedy knapsack bit allocation assigns precision per 64x128 block under a global budget.

Key results

Surprising findings

Limitations

Experimental setup

Datasets: RedPajama WikiText-2 C4

Benchmarks: WikiText-2 WinoGrande PiQA HellaSwag ARC-easy ARC-challenge BoolQ MMLU GSM8K MBPP C4

Metrics: perplexity zero-shot accuracy 5-shot accuracy latency quantization time

Baselines: RTN GPTQ GuidedQuant SlimLLM SlimLLM+ AMQ PB-LLM SqueezeLLM ICQuant

Builds on: GPTQ SlimLLM SqueezeLLM GuidedQuant classic greedy search for submodular knapsack

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