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S-Crescendo: A Nested Transformer Weaving Framework for Scalable Nonlinear System in S-Domain Representation
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Proposes S-Crescendo, a transformer-based neural operator that predicts RC-interconnect time-domain responses by summing per-pole first-order transformer predictions and refining them with recursively trained residual correction transformers.
Problem
Fast time-domain simulation of high-order nonlinear driver plus RC interconnect systems, where conventional SPICE solvers (Newton-Raphson with Jacobian/LU) are computationally expensive.
Approach
Decompose the transfer function into first-order pole-residue modes, predict each mode's response with a shared lightweight transformer, sum them, and correct the accumulated error with a cascade of residual transformer modules trained order by order, avoiding Jacobian-based iterations.
Key results
- Reported R^2 of 0.9975 on a three-pole example after recursive error correction, and R^2 between 0.964 and 0.997 for orders 4-9 when trained only on orders up to 3.
- Runtime table shows speedups from 5.9x to 18.6x over HSPICE for orders 1-10 (10 ns, 1000 steps), with the abstract claiming up to 18x.
- Abstract claims R^2 up to 0.99 on orders 1-10 and linear O(n) complexity versus cubic O(n^3) for Newton-Raphson.
Measured effects reported in the paper
| What was changed | Where | Measured | Effect |
|---|---|---|---|
| Add recursive residual error correction to the baseline prediction | S-Crescendo · Three-pole transfer function | R^2 | Helped |
| Use S-Crescendo instead of HSPICE for inference | Transfer functions, orders 1–10 · 10ns transient simulation, 1000 time steps | speedup: 18.6, 11.1, 10.5, 12.2, 11.7, 9.3, 9.0, 6.8, 5.9, 6.2 | Helped |
| Evaluate on higher orders after training exclusively on orders up to 3 | S-Crescendo · Transfer functions of orders 4–9 | R^2: 0.986, 0.997, 0.995, 0.990, 0.979, 0.964 | Mixed |
Surprising findings
- The paper reports the speedup as 'more than two orders of magnitude' in text, which contradicts its own table showing 5.9x to 18.6x speedups.
Limitations
- Accuracy degrades at higher orders due to recursive error accumulation and sparse supervision.
- Does not handle repeated poles.
- Inference latency grows roughly linearly with model order, unlike HSPICE's near-constant runtime.
Experimental setup
Datasets: HSPICE simulated waveforms of 40-nm CMOS driver with RC networks (orders 1-10)
Benchmarks: HSPICE golden waveforms
Metrics: R^2 MSE runtime speedup
Baselines: HSPICE
Builds on: partial-fraction decomposition AdamW Transformer model order reduction
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