Research map / Graph learning / Graph algorithms and clustering

A Structure-Aware Framework for Learning Device Placements on Computation Graphs

NeurIPS 2024 · Graph learning › Graph algorithms and clustering · approach: Neural combinatorial optimization on graphs · 7 citations (OpenAlex)

Read the paperCheck your idea against 108,967 papers

AI-extracted summary. Written by AI from the paper's full text. Numbers and claims can be wrong or missing context, so check the paper before you cite or build on it.

Proposes HSDAG, a five-step framework that coarsens OpenVINO computation graphs and jointly learns node embeddings, graph partitioning (via a graph parsing network) and device placement with REINFORCE using measured latency as reward.

Problem

Device placement of neural network computation graphs onto heterogeneous devices (CPU, GPU) to minimize inference time, where existing grouper-placer and encoder-placer RL methods use fixed group counts, non-trainable partitioning, and separate training of components.

Approach

Bridges grouper-placer and encoder-placer designs by learning GNN node embeddings, an unspecified number of groups via a graph parsing network pooling, and device assignment jointly end-to-end, using measured execution time as reward on smaller OpenVINO-coarsened graphs with structural, fractal, positional and output-shape node features.

Key results

• On BERT, HSDAG reduces inference time to 0.00267 s, a 58.2% speedup over CPU-only (GPU-only 56.5%).
• On Inception-V3, HSDAG achieves 17.9% speedup over CPU-only (0.0105 s vs 0.0128 s), versus 9.38% for Placeto and 6.25% for GPU-only.
• On ResNet, HSDAG achieves 52.1% speedup (0.00766 s), versus 51.2% for GPU-only and 45.3% for OpenVINO-GPU and RNN-based.

Measured effects reported in the paper

Surprising findings

• OpenVINO-CPU is slower than CPU-only on ResNet (-46.3% speedup) and BERT (-2.98%).
• Removing node IDs or output-shape features reduces Inception-V3 speedup from 17.9% to 8.59%, while removing graph structural features only reduces it to 14.8%.

Limitations

• Latency measurements ignore temperature and environmental changes; policy runs on CPU due to setup limits and iGPU was excluded.
• Baseline source code was unavailable, so baselines were reimplemented from papers by the authors.
• Evaluated on only three benchmark models and a single hardware setup (CPU, iGPU, dGPU on Intel machines).

Experimental setup

Datasets: Inception-V3 computation graph (OpenVINO) ResNet-50 computation graph (OpenVINO) BERT-base uncased computation graph (OpenVINO)

Benchmarks: Inception-V3 ResNet-50 BERT-base

Metrics: execution time (s) speedup % over CPU-only classification accuracy MSE cosine similarity L2 norm runtime (s)

Baselines: CPU-only GPU-only OpenVINO-CPU OpenVINO-GPU Placeto RNN-based device placement

Builds on: Graph Parsing Network REINFORCE Placeto GCN

Closest papers by meaning

• A Hierarchical Model for Device Placement (ICLR 2018 · similarity 0.92)
• Device Placement Optimization with Reinforcement Learning (ICML 2017 · similarity 0.89)
• N2GON: Neural Networks for Graph-of-Net with Position Awareness (ICML 2025 · similarity 0.84)
• Chip Placement with Diffusion Models (ICML 2025 · similarity 0.84)
• LayerDAG: A Layerwise Autoregressive Diffusion Model for Directed Acyclic Graph Generation (ICLR 2025 · similarity 0.84)
• Learning Representations for Hierarchies with Minimal Support (NeurIPS 2024 · similarity 0.84)