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Research map / Architectures and efficiency / Pruning and efficient tuning

TETRIS: TilE-matching the TRemendous Irregular Sparsity

NeurIPS 2018 · Architectures and efficiency › Pruning and efficient tuning · approach: Structured network pruning · 20 citations (OpenAlex)

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Measured effects reported in the paper

What was changedWhereMeasuredEffect
add input/output channel reordering before block pruning (ablation)block sparsity · VGG16 ImageNet, various block sizestop-1 accuracy drop vs 1x1: 2.3% ~ 6.0% drop -> 0.1% ~ 2.4% dropHelped
add reordering to block pruning on LeNet and VGG14 (ablation)block sparsity · MNIST, CIFAR-10accuracy vs sparsity across block sizesHelped
increase block size from 1x1 to 32x32 with reordering (ablation)TETRIS on VGG16 · VGG16 ImageNetspeedup: accuracy 73.36% -> 71.004%; speedup 2.35x vs denseHelped
increase block size beyond 32 (ablation)TETRIS on VGG16 · VGG16 ImageNetspeedupHurt
optimize reordering (incremental G updates, row maxima) (ablation)reordering algorithm · VGG16 FC1 layerpruning time: more than 2 hours -> less than 1 minuteHelped
add runtime permutation of inputs/outputsinference · VGG16 layerscomputation time: about 4% of layer computation timeHurt

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